1. Field of the Invention
The present invention relates to access to a flash memory, and more particularly, to a method for performing data pattern management regarding data accessed by a controller of a flash memory, and to an associated memory device and a controller thereof.
2. Description of the Prior Art
As technologies of flash memories progress in recent years, many kinds of portable memory devices, such as memory cards respectively complying with SD/MMC, CF, MS, and XD standards, solid state disks (SSD), and embedded Multi Media Card (eMMC) are widely implemented in various applications. Therefore, the control of access to flash memories in these memory devices has become an important issue.
Taking NAND flash memories as an example, they can mainly be divided into two types, i.e. Single Level Cell (SLC) flash memories and Multiple Level Cell (MLC) flash memories. Each transistor that is considered a memory cell in SLC flash memories only has two charge levels that respectively represent a logical value 0 and a logical value 1. In addition, the storage capability of each transistor that is considered a memory cell in MLC flash memories can be fully utilized. More specifically, the voltage for driving memory cells in the MLC flash memories is typically higher than that in the SLC flash memories, and different voltage levels can be applied to the memory cells in the MLC flash memories in order to record information of multi bits (e.g. two bits binary values 00, 01, 11, or 10) in a transistor that is considered a memory cell. Theoretically, the storage density of the MLC flash memories may reach more than twice the storage density of the SLC flash memories, which is considered good news for NAND flash memory manufacturers who encountered a bottleneck of NAND flash technologies.
As MLC flash memories are cheaper than SLC flash memories, and are capable of providing higher capacity than SLC flash memories while the space is limited, MLC flash memories have been a main stream for implementation of most memory devices on the market. However, various problems of the MLC flash memories have arisen due to their unstable characteristics. In order to ensure that the access control of a memory device over the flash memory therein can comply with related standards, the controller of the flash memory should have some handling mechanisms in order to properly handle its data access operations.
According to the related art, the memory device having the aforementioned handling mechanisms may still suffer from some deficiencies. For example, due to usage behaviors of the user, data of some specific data patterns would probably be constantly written into the same logical address of the flash memory, where these specific data patterns may easily cause errors such as write/program errors, read errors, etc. Therefore, a novel method is required for performing data pattern management regarding data accessed by the controller in order to reduce the probability of error occurrence.